Sunday, September 26, 2010

Coreboot Config Cleanups

I have submitted a few patches to the coreboot team that cleanup some configuration items. Mostly, they remove duplicated and misplaced configuration items.

For instance, for some of the boards I looked at, they have a hard reset because their southbridge provides that functionality. However, the hard reset was configured in the mainboard config instead. I moved the configs to the southbridge and removed the config from the mainboard. There are a lot of config options similar to this one. I am going to try to get some more patched out tomorrow.

Tuesday, September 14, 2010

BIOS hacking

Previously, I had soldered an soic8 socket onto my motherboard in place of the soic8 surface mount chip so that I could replace the soic8 chip easily. Here's a picture:

BTW, does anyone know where I can buy more of the soic8 sockets pictured above? I was given one by a friend and I don't know where to get them.

I have finally soldered up a more permanent version of my soic8 serial flash programmer. The basic circuit design was by Uwe Hermann. I added a 3M test clip to make it easier to flash my chips. Here's a picture:

Update: The soic socket adapter is located at Whoa, that's expensive shipping.

Friday, September 3, 2010

Inteltool from Coreboot

I am doing some work trying to add Core i7 support to the inteltool utility from the Coreboot project.

Core i7 is very different from the previous intel chipsets, and figuring out how to represent some of the stuff in inteltool's view of the world is a challenge. The main problem I am facing right now is that inteltool thinks the northbridge chip contains the memory controller. However, in i7, that functionality has been moved into a PCI device on the processor itself. I am still trying to figure out a solution.